Were growing! Our team in Parma (Italy) is seeking a Sr. ASIC Design Engineer.Responsibilities :Developing microarchitecture specifications for a next-generation Computer Vision processor;Designing and implementing video compression logic, image processing logic, and computer vision processors in Verilog and SystemVerilog;Designing integration logic, performing synthesis, and optimizing for timing, area, and power;Developing frontend methodologies and tool flows;Participating in chip bring-up and testing;Requirements :Masters degree in Electrical Engineering with 4 years of experience;Very good understanding of computer architecture, microprocessors, digital electronics, VLSI/ASIC design, and logic design;Proficiency in hardware description languages like Verilog/SystemVerilog;Ability to program in scripting languages such as Python and Perl;Knowledge of design verification and functional coverage;Strong communication skills and a team player attitude;Knowledge of logic synthesis and timing closure is essential; some experience is a plus;Knowledge or experience in image/video processing, computer vision, or machine learning is a plus.To apply, please submit your resume with the subject: JOB#VLSI or apply online on the Ambarella website.As an Equal Opportunity / Affirmative Action Employer, Vislab and Ambarella recruit qualified applicants regardless of race, color, national origin, sex, disability, or veteran status.For our privacy policy related to candidate data, please see this link: https://tinyurl/yd66nbsaRequired Experience : Senior ICKey Skills : Mechanical Design, SoC, System Design, GDT, CAD, Creo, SolidWorks, Mechanical Engineering, Perl, AutoCAD, HVAC Design, CatiaEmployment Type : Full-TimeExperience : 4 yearsVacancy : 1Location: Parma, Emilia-Romagna, Italy
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