Descrizione Lavoro
A leading technology firm in Italy is seeking a Functional Verification Principal Engineer to interface with various teams to ensure optimal performance of systems. Key responsibilities include developing test plans, executing verification environments, and mentoring engineers. The ideal candidate will have a Master's Degree and over 15 years of experience in verification of complex systems, along with strong skills in SystemVerilog and UVM. The position offers a hybrid work model and a competitive compensation package.
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