OverviewI am recruiting for an innovative and fast-growing technology company developing next-generation solutions for high-performance data communication. This is a senior leadership role with the flexibility of fully remote working.ResponsibilitiesTake ownership of the full SerDes analog and mixed-signal design strategy, guiding technical direction, mentoring engineers, and ensuring delivery of industry-leading performance.Shape the architecture, influence design methodologies, and play a pivotal role in the successful release of complex products in advanced CMOS FinFET technologies.Oversee and be involved in the development of core analog building blocks.Define and drive SerDes architecture in collaboration with system architects and other functional teams.Establish robust verification and sign-off strategies to meet aggressive performance and reliability targets.Lead and mentor engineering teams, fostering best practices in design, simulation, and layout.Support silicon bring-up, validation and characterisation, providing direction through to product launch.QualificationsBachelor’s or Master’s in Electrical Engineering or related discipline, with 15+ years’ industry experience.Proven leadership in analog and mixed-signal design for SerDes applications.Strong expertise in high-speed circuit design, signal integrity, and power integrity.Proficiency with EDA tools.Exceptional communication and decision-making skills, with the ability to lead in a fast-paced, collaborative environment.If you are an experienced engineer with a track record in FINFET SerDes design, get in touch with Parm Shergill.
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